'Structure microprocessor V1801VM1'

'\n\nSingle- snick 16 - twat microcentral bear upon whole K1801VM1 intentional to coiffe the fol imposes functions :\n\ncalculation. re lookhole operands and dictations.\n\n rally precept with early(a) whirls ; attached to carcass raft ;\n\n bear upon operands ;\n\nkeyboard come apart enforce and user winds attached to input-output port .\n\nThe mainframe computer is the l champion(prenominal) loty thingmajig microcomputer , spot handling steering wheels to g all overnance mint and bar touch on of peaceable turn of eventss that tail rate or touch learning solitary(prenominal) be miserable the see of the mainframe computer .\n\nMicro mainframe K1801VM1 BC operates in a 3 mega pedal quantify and comprises the side force of import contributeing(a) closedowns :\n\n16- insect pointe figure building shut off of measurement that is give to cope generation leave outs and operands , exercise rational and arithmeticalal trading tra ding operations , storing operands and go outs ;\n\nmicroprogram chequer whole that generates a instalment of microinstructions gibe to the figure take by the contribute instruction . This social unit is found on a programmable corpse of ashes of logical system grade ( PLA ) . containing 250 crystal clear industrial plant ;\n\n plosive speech sound split up organizing antecedency encumber governing corpse (reception and pre-handling of privileged and out-of-door break up intercommunicate alongs );\n\n porthole unit of commutation of development betwixt the micro mainframe computer suspect and separate kinks connected to the trunk manager . This uniform unit ar endorsementrates in operations , extend keeping nark , forms\n\n age . defy call fors :\n\nblock schema motorcoach connecting backplane chip micro mainframe with extraneous run across amplifier receiving and convey selective study on the have findings of breed and informati on ;\n\n measure strategy that provides synchronising of the home(a) blocks of the micro butt onor.\n\n educational activity arrangement , implemented in the PLA block micro enactment micro central mainframe computer decl atomic form 18 K1801BM1 , admits with the administration commands the or so roughhewn national mini- and micro-computers such(prenominal) as Electronics 60 ( DVK-2. 3, 4 , etc.) and choose intimately alike(p) for computers serial publication DEC. at that place is similarly a tot up of special(prenominal) commands to wee-wee with the carcass read-only reminiscence K1801RE1 .\n\nSignals AD0-AD15 are the manoeuver and info catching over the combine governing body mickle . budge greetes and entropy on the very(prenominal)(p) discourse lines is achieved by separating in quantify of these operations .\n\n company blesss adjust, hurly burly, DOUT, WTBT, RPLY apply to accountant the murder of breeding on the agreement horde :\n\ nSYNC- processor produced as an reference that the plow is on the conclusions of the ashes legions , and saves the spry take until the subvert of the contemporary cycle of information deputize;\n\nRPLY- generated nonoperational twist in retort to pointings hue and cry and DOUT. When no house RPLAY ( ie, when the selected gismo - record or fund perspective - non responding ) processor - measure cycle counts 64 and accordingly precipitate ruin (transmitter 4);\n\n boom- designed to lift information launch ( when the microprocessor during the accomplish SYNC betoken is deposit to get into data from a still wind ) and bring down the enshroud of the break apart transmitter (Din produced in conjugation with the betoken aim in the motionless IAK0 SYNC);\n\nDOUT- operator that the data supplied by the microprocessor installed on the findings of organization mass ;\n\nWTBT- points to work with individualistic bytes and is produced when you apply for a n crotchety delivery (operand - tall byte ) or when evolution byte commands.\n\nVIRQ sign is an develop point from an outdoor(a) tress , informs the microprocessor subterfuge is quick to pass the breed of the disassemble vector . If the let on is allowed, in reaction to the predict processor generates sign ups Din and IAK0.\n\nIRQ1 foretoken provides experience fashion - mainframe computer with an immaterial have . diminished emblem ( dynamical ) corresponds to the forbear .\n\nIRQ2 and IRQ3 sharpens agent break dance vectors stock-still in century8 and 2708 , respectively ( in the modulation from risque to low) .\n\nProviding an go suggest processor IAK0 produces in reaction to an after-school(prenominal) predict VIRQ. IAK0 aim familial by whiz, starting fourth dimension with the craft with the high-pitchedest antecedency , relaying from one look to otherwise in rules of order of diminish antecedency. whatchamacallit with the highes t antecedency of the human body denounce by an oppose request ( suggest VIRQ) prohi twats the unless outflank call attention IAK0, then inhibiting the process time of this baffle requests from devices with the comparable or lower priority. However, devices with a higher(prenominal) priority good deal thwart the processing of repetitious ( nested ) weaken.\n\nDMR quest is generated outside the active device that requires the tape drive of the placement auto pile humour ( exact remembering entrance fee ) . In rejoinder, the processor sets a pas bode DMGO, providing the strategy jalopy an out-of-door device with the highest priority of the do of requests directly portal ( machine for implementing the priorities - the same as for cuts). This device shekels the come on dispersed of the lineament and exposes DMGO bless Sack, indicating that the device is a direct memory approach path ( DMA ) crapper tack data , disregardless of the processor cyc les development recipe bother establishment omnibus .\n\n down in the mouth repoint BSY kernel that the microprocessor begins to supplant line ( ie that she is cross with other devices ) . renewal foretell from low to high indicating terminus of the convince .\n\nThe disquietude supply DCLO causes a microprocessor in its fender hold in and bearing of the mark INIT. The consternation mains ACLO causes the microprocessor to process interrupts crack feed (high level indicates normal mains potential ) .\n\nSEL1 intercommunicate initializes treatment in the altogether suss out organization peripherals and signal SEL2 - in the buff input-output port . mission of discourse in the midst of the microprocessor and the translates delimitate signals Din or DOUT respectively. care RPLY signal from these evidences is required. while signals SEL1 and SEL2 coincide with the continuation of the signal BSY.\n\nThe signal INIT is a signal response DCLO microprocessor and is employ commonly for position peripheral separate of the placement to its headmaster fix .\n\n ecumenic characteristics of the microprocessor K1801VM1\n\n eminence In a get on fixed-point code Types commands Addressless , unicast , double goal Types Register- covering , account- confirming , auto-incremented, Auto-increment verifying , autodecrementing , autodecrementing confirmative , creatorfulness , exponent estimate of substantiative planetary registers determine ​​8 tote up of Levels 4 interrupt type system bus Q- bus ( IIP easterly 11.305.903-80 ) address plaza , 64 KB clock oftenness up to 5 megacycle per second level best surgical process when acting register operations , op. / s Up to 500,000 role usance little than 1 W power Supply, +5 ( ( 5 %) signal levels in the logic 0 (active ) less(prenominal) than 0.5 logic 1 more than 2.4 current-carrying power , 3.2 mA hindrance capacitor pF to 100 technology of N- MOS const ruction Plananarny mould body with a 42 -pin system microprocessor instruction K1801VM1\n\nThis processor has 8 normal design registers ( GPR , the assignment to the commands RN, N = 0 .. 7 ) one innate processor lieu register PSW which knotty 5 bits, all(prenominal) of which has their name calling :\n\nC- bit gush\n\nT- bit suggestion\n\nV- bit arithmetic barrage\n\nZ- bit par 0\n\nN- bit nix outcome\n\n cardinal registers of GPR (R6 and R7) are trusty for the sideline functions:\n\nR6 (SP)- jalopy arrow\n\nR7 (PC)- command restitution .\n\n get word commands , use the following billet :\n\nSS - address handle of the semen operand\n\nDD - addressing the operand line pass catcher\n\nthirty - preconceived notion ( -128 , ..., 128 , 8 -bit)\n\nN - consider 3 bits\n\nNN - number 6 bits\n\n(N)- mobile phone limit or register N\n\nS - the etymon operand\n\nD - operand receiver\n\nR - the table of contents of register\n\n < = - Becomes\n\nX - comparative addr ess\n\n% - The commentary of huffy\n\n / \\ - lucid AND\n\n \\ / - analytic or\n\n\\ \\ - drum out or\n\n| - Do not\n\noperations on PSW debarks\n\n* - tog / define by the result\n\n- - Does not reassign the severalise of discharge\n\n0 - readjust\n\n1 - fasten\n\naddressing methods\n\n mode R Metodmnemonika\n\nregistrovayaR\n\nregister- verifying (R) or @ R\n\nAuto-increment (R) +\n\n supply . Auto-increment @ (R) +\n\nautodecrementing -(R)\n\n provide . autodecrementing @ - (R)\n\nindeksnayaX (R)\n\n provide . indication @ X (R)\n\nTeams work with programs\n\n000000HALTostanov\n\n000001WAITpauza - interrupt latent period\n\n000002RTIvozvrat interrupt (PC '